Virtual Sensor Based Fault Detection and Classification on a Plasma Etch Reactor
نویسنده
چکیده
The SEMATECH sponsored J-88-E project teaming Texas Instruments with NeuroDyne (et al) focused on Fault Detection and Classification (FDC) on a Lam 9600 aluminum plasma etch reactor, used in the process of semiconductor fabrication. Fault classification was accomplished by implementing a series of virtual sensor models which used data from real sensors (Lam Station sensors, Optical Emission Spectroscopy, and RF Monitoring) to predict recipe setpoints and wafer state characteristics. Fault detection and classification were performed by comparing predicted recipe and wafer state values with expected values. Models utilized include linear PLS, Polynomial PLS, and Neural Network PLS. Prediction of recipe setpoints based upon sensor data provides a capability for cross-checking that the machine is maintaining the desired setpoints. Wafer state characteristics such as Line Width Reduction and Remaining Oxide were estimated on-line using these same process sensors (Lam, OES, RFM). Wafer-to-wafer measurement of these characteristics in a production setting (where typically this information may be only sparsely available, if at all, after batch processing runs with numerous wafers have been completed) would provide important information to the operator that the process is or is not producing wafers within acceptable bounds of product quality. Production yield is increased, and correspondingly per unit cost is reduced, by providing the operator with the opportunity to adjust the process or machine before etching more wafers. 1.0 Background The ability to sense and adapt to varying material characteristics and process conditions over a large range of operating conditions is critical to the affordable, high volume manufacture of IC electronic devices. In a flexible manufacturing environment this is highly dependent upon the accurate development and subsequent adaptation of models which simulate process, wafer, and equipment relationships and with feedback from insitu sensors are used to predict process trends and develop control strategies. Virtual sensor models are shown to be capable of predicting machine states and wafer state properties such as line width and oxide loss based upon process sensor data (machine state sensors, Optical Emission Spectroscopy (OES), RF Monitoring (RFM)). Improvements in sensor based feedback and control that remove uncertainty in plasma etching will have a major impact in semiconductor manufacturing and integrated circuit fabrication. As plasma etch is a key step in many semiconductor fabrication processes, improvements in plasma etch using virtual sensor based models provide a crucial link to intelligent process monitoring and sensor-based control in the multibillion dollar semiconductor manufacturing industry. A key automation problem in the semiconductor manufacturing area is the efficient high-yield fabrication of semiconductor circuits. Plasma etching, a dry etching technique that usually follows the growth or deposition of thin films, is the key process by which desired circuits are patterned on a semiconductor wafer. As pattern geometries become more intricate in the submicron range, etching processes become more complex. In a typical etching process, a mixture of different halogencontaining gases are introduced in a vacuum etching chamber. The plasma is generated in the reactor by a high-frequency RF source. The desired goals of the etching process are controlling performance parameters such as the etch rate, the selectivity of etch for process endpoint control, the anisotropy for feature size control, and minimum defect generation. A number of process factors influence all of these parameters of interest: flow rate, power density of the RF source, pressure, chemistry, purity of the environment, substrate bias, and electrode configuration. Because the plasma process is highly nonlinear, controllability of the desired parameters is considered intractable. Typical semiconductor manufacturers use a trial and error procedure to realize a repeatable fabrication process that has acceptable yield. This is expensive in time and material. Better modelling, instrumentation and control techniques that remove this uncertainty in etching will have a major impact in semiconductor manufacturing and integrated circuit fabrication. Semiconductor Wafers Film Formation Lithography Etching Impurity Doping Integrated Circuits Figure 1. Sequence of major process steps in silicon integrated circuit fabrication
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ورودعنوان ژورنال:
- CoRR
دوره abs/0706.0465 شماره
صفحات -
تاریخ انتشار 2007